1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory and a method of manufacturing, and more particularly, it relates to the structure of intergate insulating films of a memory cell and a peripheral transistor.
2. Description of the Related Art
Nonvolatile semiconductor memories such as NAND type flash memories are nonvolatile and permit higher integration, and therefore, have recently been installed in various electronic devices.
As the structure of a memory cell of the NAND type flash memory, a gate electrode structure has been known in which a floating gate electrode and a control gate electrode are stacked via an intergate insulating film.
A stacked film (hereinafter, an ONO film) composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film is often used for the intergate insulating film to improve the coupling ratio of the memory cell.
However, as the memory cells are increasingly miniaturized, an oxidizer in an oxidizing process carried out after the formation of the gate electrode diffuses into the silicon oxide films of the ONO film, and thus reacts with silicon films forming the floating gate electrode and the control gate electrode. As a result, bird's beaks produced from the silicon oxide films are formed at an interface between the ONO film and the floating gate electrode or the control gate electrode, which reduces the dielectric constant of the intergate insulating film and the coupling ratio of the memory cell.
An effective way to avoid this problem is to use, as the intergate insulating film, a film composed of a silicon nitride film, a silicon oxide film, a silicon nitride film, a silicon oxide film and a silicon nitride film (hereinafter, an NONON film) in which the silicon nitride films are further formed in the top and bottom layers of the ONO film.
However, the miniaturization of the memory cell causes another problem that inter-cell interference is induced by parasitic capacitance between the adjacent floating gate electrodes leading to a varied threshold voltage of the memory cell.
The cause of this problem is that the NONON film increases the parasitic capacitance between the adjacent floating gate electrodes due to its higher dielectric constant than that of the ONO film.
This aggravates the variation of a threshold voltage of the memory cell due to the inter-cell interference and degrades the performance of the memory cell.
On the other hand, an advantage of using the NONON film as the intergate insulating film is that the diffusion of elements forming a fixed charge into a semiconductor substrate can be suppressed and that the performance of the memory cell and of a peripheral transistor can be prevented from degrading.